#Cpu-Design
1 post in tag “Cpu-Design”.
Superscalar Processors: Register Renaming, Reorder Buffers, and How Modern Cores Extract ILP
2023-09-28A microarchitectural deep dive into superscalar execution: register renaming, the reorder buffer, reservation stations, and the issue queue, examining how Haswell, M1, and Zen4 extract instruction-level parallelism from sequential code.