#Cpu
5 posts in tag “Cpu”.
CPU Microarchitecture: Pipelines, Out-of-Order Execution, and Modern Performance
2025-12-04An in-depth exploration of CPU microarchitecture: instruction pipelines, hazards, branch prediction, out-of-order execution, register renaming, superscalar and SIMD units, and how software maps to hardware for performance.
CPU Caches and Cache Coherence: The Memory Hierarchy That Makes Modern Computing Fast
2022-07-12A comprehensive exploration of how CPU caches bridge the processor-memory speed gap. Learn about cache architecture, replacement policies, coherence protocols, and how to write cache-friendly code for maximum performance.
Branch Prediction and Speculative Execution: How Modern CPUs Gamble on the Future
2021-08-15Explore how modern processors predict branch outcomes and execute instructions speculatively, the algorithms behind branch predictors, the performance implications for your code, and the security vulnerabilities like Spectre that emerged from these optimizations.
CPU Caches and Memory Hierarchy: The Hidden Architecture Behind Performance
2021-06-22A deep exploration of CPU cache architecture, from L1 to L3 caches, cache lines, associativity, replacement policies, and cache coherence. Learn how memory hierarchy shapes modern software performance.
Cache‑Friendly Data Layouts: AoS vs. SoA (and the Hybrid In‑Between)
2021-03-18How memory layout choices shape the performance of your hot loops. A practical guide to arrays‑of‑structs, struct‑of‑arrays, and hybrid layouts across CPUs and GPUs.